Contributions:RHX: Revision history

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curprev 20:5120:51, 13 August 2025 Rlellis talk contribs 6,733 bytes +1,143 →Parameters
curprev 20:0420:04, 13 August 2025 Rlellis talk contribs 5,590 bytes +1,678 →Parameters

curprev 20:5720:57, 12 August 2025 Rlellis talk contribs 3,912 bytes +1 →Synopsis
curprev 20:5720:57, 12 August 2025 Rlellis talk contribs 3,911 bytes +1,370 →Synopsis

curprev 20:0620:06, 18 June 2025 Rlellis talk contribs 2,541 bytes −1,428 →Parameters

curprev 17:4317:43, 6 September 2024 Rlellis talk contribs 3,969 bytes +18 →Parameters
curprev 17:4217:42, 6 September 2024 Rlellis talk contribs 3,951 bytes +757 →Parameters

curprev 19:4319:43, 9 August 2024 Rlellis talk contribs m 3,194 bytes +1,204 →Parameters

curprev 22:2322:23, 7 August 2024 Rlellis talk contribs 1,990 bytes +1,221 →Synopsis

curprev 21:3521:35, 6 August 2024 Rlellis talk contribs 769 bytes +769 Created page with "==Synopsis== The Intan RHS has four SPI ports (with each port labelled A,B,C,D) which sends data to a FPGA. These ports communicate with the chips located on supported headstages. Each port has four output signals responsible for communication with the amplifier chips, two of which (MISO1,MISO2) are used to transmit data. Each chip controls 16 channels, and each chip transmits data over a single MISO line. Over all four ports, this means there are 8 lines over which dat..."

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